1. Field of the Invention
The disclosure relates to a method and apparatus for providing single flux quantum logic gates. More specifically, the disclosure relates to providing merge gates, join gates, and dual-rail branch gates for processing single flux quantum (SFQ) pulses.
2. Description of Related Art
In the field of digital logic extensive use is made of well known and highly developed CMOS (complementary metal-oxide semiconductor) technology. As CMOS has begun to approach maturity as a technology, there is an interest in alternatives that may lead to higher performance efficiency in terms of speed, power computational density, interconnect bandwidth and the like.
An alternative approach to CMOS technology comprises superconductor-based single flux quantum circuitry, utilizing superconducting Josephson junctions, with typical signal power of around 4 nW, at a typical data processing rate of 20 Gb/s or greater. Such devices have operating temperatures of about 4° K.
Superconductor devices based on the Josephson effect are replacing conventional devices based on semiconductor technology for high performance and low power. The superconductor devices are well known as a high-speed, low-power digital logic family and are scalable to very-large scale integrated (VLSI) circuits. Digital circuits that employ superconductor devices and are fabricated using present circuit fabrication technology operate at clock rates ranging between 10-100 GHz. Development of advanced superconducting devices require sophisticated Josephson junction logic gates that operate based on the superconducting principles. Therefore, there is a need for such advanced logic gates.